| Telecom Vacancies Description |
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Employer: Alpha & Omega Semiconductor
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| Address: |
495 Mercury Drive |
| City: |
Sunnyvale |
| State / Province: |
CA |
| Country: |
USA |
| Zip code: |
94085 |
| Phone number: |
+1 408-830-9742 |
| Fax number: |
+1 408-830-9749 |
| E-mail: |
Send Message
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| Company URL: |
www.aosmd.com |
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Employer need: IC Design Director
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Telecom Vacancy Description:
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| Job Category: |
Engineering |
| Timing: |
Full Time |
| Place of work/City: |
Sunnyvale |
| Place of work/Country: |
USA |
| Application Documents: |
CV/Resume |
| Job description, requirements : |
• Minimum of 10 years of analog and mixed signal IC design experience, with at least 5 years in power IC and 3 years in recent management role.
• Good understanding of CMOS process/technology. Bipolar and BCD knowledge is a plus. Understanding of IC design and layout CAD tool is essential.
• Knowledge of complete product development cycle from product definition to manufacturing release is required.
• Knowledge of DC/DC systems, including behavior simulation, is preferred.
• Work with marketing/application to define new power management products and product roadmap.
• A proven team leader and an independent thinker who will readily accept the challenge of growing a business with a fast-paced start-up.
• BSEE required; MSEE preferred. |
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Employer need: Power IC Test
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Telecom Vacancy Description:
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| Job Category: |
Engineering |
| Job Specific: |
Lab Technician |
| Timing: |
Full Time |
| Place of work/City: |
Sunnyvale |
| Place of work/Country: |
USA |
| Application Documents: |
CV/Resume |
| Job description, requirements : |
• Minimum of 3 years of experiences in semiconductor. Analog or Power background is a plus.
• Responsibilities include logistics support for lab maintenance, layout of PCB used for both wafer-level and final test ATE, hardware generation for IC testing, evaluation and characterization, and all required hardware debugs.
• Working closely with test engineers, product engineers, design engineers, assembly, reliability and external vendors.
• Strong PCB design background -- Knowledge of OrCAD layout tool is required. Knowledge of LabView software is highly preferred.
• Good communication skill is needed.
• Looking for a well-rounded person who can thrive in a start-up environment.
• ASEE required; BSEE preferred. |
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Employer need: Senior Application Engineer
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Telecom Vacancy Description:
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| Job Category: |
Engineering |
| Job Specific: |
Power IC |
| Timing: |
Full Time |
| Place of work/City: |
Sunnyvale |
| Place of work/Country: |
USA |
| Application Documents: |
CV/Resume |
| Job description, requirements : |
• Minimum of 5 years of experiences in power electronics, including switching and linear regulator, power control functions and/or battery management.
• Maintain strong interface with customers, field application engineers and design engineers on company products.
• Provide technical support to new product development. Responsibilities include generating new product ideas, competitive analysis, demo board design, new IC prototype evaluation and providing ongoing technical support to field personnel and customers.
• Develop datasheets and generate application notes for new products. Support customers in board design when necessary.
• Must possess good verbal and written communication skills.
• Travel is required.
• An independent and resourceful person who will thrive in the fast-paced start-up environment.
• BSEE required; MSEE preferred. |
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Employer need: Senior IC Design Engineer
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Telecom Vacancy Description:
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| Job Category: |
Engineering |
| Timing: |
Full Time |
| Place of work/City: |
Sunnyvale |
| Place of work/Country: |
USA |
| Application Documents: |
CV/Resume |
| Job description, requirements : |
• Minimum of 5 years of analog and mixed signal IC design experience, preferably in power management, including switching or linear regulators.
• Oversee the design, evaluation, characterization and production release of power management IC on CMOS/BiCMOS foundry processes. Design necessary sub-blocks such as amplifiers, comparators, voltage reference, bias generator and integrated power driver.
• Good lab skills and ability to work with test engineer and application engineer
• Knowledge of semiconductor device physics,
• Knowledge of DC/DC system, including behavior analysis, is a major plus.
• Working experience with Cadence EDA tool is preferred.
• An independent and resourceful person who will thrive in the fast-paced start-up environment.
• BSEE or MSEE is required. |
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Employer need: Senior Layout Designer
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Telecom Vacancy Description:
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| Job Category: |
Engineering |
| Timing: |
Full Time |
| Place of work/City: |
Sunnyvale |
| Place of work/Country: |
USA |
| Application Documents: |
CV/Resume |
| Job description, requirements : |
• Minimum of 5 years of analog and mixed signal IC layout experience in either CMOS or BiCMOS. Experience in power management IC is a plus.
• Responsibilities include the entire IC mask design flow from chip planning, hierarchical layout, top-level routing, layout verification and fractured data generation, to bonding diagram creation.
• Working knowledge of Cadence Virtuoso-XL is required. Experience in Assura verification tool is preferred.
• Knowledge of critical analog device placement, power bussing and noise isolation layout techniques.
• Good understanding of process layers and foundry design rules.
• Good communication skill.
• An independent and resourceful person who will thrive in the fast-paced start-up environment.
• ASEE or Certificate from CAD Layout institutions |
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